1. Field of the Invention
The present invention relates generally to a hysteresis circuit device, and more particularly to a hysteresis circuit device with modulated hysteresis voltage levels for reducing the manufacturing cost.
2. Description of the Prior Art
Referring to FIG. 1, it is a comparator with two inputs (an input voltage VIN and a reference voltage VR) and one output VO. When the input voltage VIN is higher than the reference voltage VR, the output voltage VR is at the voltage high level; otherwise, it is at the voltage low level.
Referring to FIG. 2, it illustrates the relationships of the input voltage VIN, the reference voltage VR, and the output voltage VO of the comparator as shown in FIG. 1. Herein, the reference voltage VR is coupled to a direct voltage source and the input voltage VIN is coupled to an input voltage source with noises. Before time t0, because the input voltage VIN is higher than the reference voltage VR, the output voltage VO is ‘0’. Between time t0 and t1, the input voltage VIN is lower than the reference voltage VR, so the output voltage VO is ‘1’. Between time t1 and t2, the input voltage VIN is higher than the reference voltage VR due to the effect of noise, so the output voltage VO is ‘0’. The change of the voltage values in the above situation results in the false detection of the output voltage VO because of the noises. After time t2, the input voltage VIN is lower than the reference voltage VR, so the output voltage VO is ‘1’.
The conventional way to resolve the false detection of the output due to the noise is to employ the interior circuit of a comparator and positive feedback mechanism to produce hysteresis to achieve anti-noise. Referring to FIG. 3, it illustrates the conventional hysteresis comparing circuit apparatus, including four PMOS transistors, two NMOS transistors, and a constant direct current source IA. All of the source regions of the PMOS transistors P1, P2, P3, and P4 are commonly coupled to the system voltage source VDD. The gate electrode of the transistor P1, the gate electrode and drain region of the transistor P3, the drain region of the transistor P2, and the drain region of the transistor N1 are commonly electrically coupled together. The gate electrode of the transistor P2, the gate electrode and the drain region of the transistor P4, the drain region of the transistor P1, and the drain region of the transistor N2 are electrically coupled together. The source regions of the transistors N1 and N2 are commonly coupled to the input terminal of the constant current source IA. The output terminal of the constant current source IA is coupled to the ground. The gate electrode of the transistor N2 is coupled to the positive input terminal VR of the comparator and the gate electrode of the transistor N1 is coupled to the negative input terminal VIN of the comparator. If the size of the transistor P1 is larger than that of the transistor P3 and the size of the transistor P2 is larger than that of the transistor P4, this hysteresis comparing circuit has the hysteresis effect. Because this phenomenon is well known to those who are familiar with this technical field, it will not be described in detail here. However, because the mobility, the input voltage and the thickness of the gate oxide layer of the MOS transistors are easily affected with the change of the fabrication process or the temperature, the hysteresis width (the difference between the high input voltage and the low threshold voltage) of the hysteresis comparing circuit apparatus is not easily to control and modulate according to the need of a user.
Based on the weaknesses of the above conventional technology, another conventional hysteresis circuit device employing the exterior circuit of a comparator to control a constant hysteresis width is provided. As referred to FIG. 4, it shows a conventional hysteresis circuit device 100, including a threshold voltage generator 110, a switch 120, and a comparator 130. The hysteresis circuit device 100 is used to detect an input signal VIN and a reference signal VR, and output a digital signal VO. Herein, the threshold voltage generator 110 is used to receive the reference voltage VR, and output a high threshold voltage VRH and a low threshold voltage VRL. The input of the switch 120 is coupled to the high threshold voltage VRH and a low threshold voltage VRL of threshold voltage generator 110, and the digital signal VO is received to choose the high threshold voltage VRH or the low threshold voltage VRL as the output VT of the switch 120. When the digital signal VO is at the low voltage level, the switch output signal VT is the low threshold voltage VRL. When the digital signal VO is at the high voltage level, the switch output signal VT then is the high threshold voltage VRH. The comparator 130 is coupled to the switch 120. The positive input terminal of the comparator 130 is used to receive the output signal VT of the switch 120 and the negative input terminal of the comparator 130 is used to receive the input signal VIN. According to the output signal VT of the switch 120 and the input signal VIN, the comparator 130 outputs the digital signal VO.
Referring to FIG. 5, when the digital signal VO is at the low voltage level, the output signal VT of the switch 120 is the low threshold voltage VRL. Then, the comparator 130 compares the output signal VT of the switch 120 and input signal VIN. When the input signal VIN is higher than the low threshold voltage VRL, the digital signal VO of the comparator 130 is still at the low voltage level. When the input signal VIN is lower than the low threshold voltage VRL, the digital signal VO is switched from the low voltage level to the high voltage level. In the meantime, if the input signal VIN inputs carries noises and the noises are lower than the hysteresis width (VRH–VRL), the output result is not affected. Thereafter, because the digital signal VO is switched from the low voltage level to the high voltage level, the switch output signal VT is switched to the high threshold voltage VRH. At this moment, the input signal VIN is far less than the high threshold voltage VRH. Therefore, the digital signal VO is still at the high voltage level. Because the switch 120 chooses either the high threshold voltage VRH or the low threshold voltage VRL opportunely, and changes the judging voltage level of the comparator 130 opportunely, the input signal VIN can avoid the interference of the noises.
Referring to FIG. 6, it schematically shows the circuit structure of the threshold voltage generator 110 in FIG. 4, including an input voltage, i.e. the reference voltage VR, two output voltages, and i.e. the high threshold voltage VRH and the low threshold voltage VRL. The threshold voltage generator 110 also includes two current source groups in parallel (the first current source group 112 and the second current source group 114), a buffer 116, and two resistors (R1 and R2). Herein, one terminal of the resistor R1 is coupled to the first current source group 112, and is one of the outputs of the input voltage level generator 110, i.e. the high threshold voltage VRH. The buffer 116 receives the reference voltage VR. The output of buffer 116 is coupled to another terminal of the resistor R1 and one terminal of the resistor R2. Another terminal of the resistor R2, coupled to one terminal of the second current source group 114, is another output of the input voltage level generator 110, i.e. the low threshold voltage VRL. Another terminal of the second current source group 114 is coupled to the ground.
The prior art of the circuit design of the threshold voltage generator 110 as mentioned above can make the hysteresis width a constant without being affected by the exterior environment, and avoid outputting the false detection because of the noises. However, it includes a buffer and many current sources in this design. They occupy larger chip area and dissipate more extra operation power. Hence, the production cost is also increased.